发明名称 SEMICONDUCTOR IC DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To contrive the reduction in manufacturing cost by a method wherein the mutual wiring of logical circuits of the (i-1)-th layer and the i-th layer is made only as the input wiring from the i-th layer to the (i-1)-th layer, and the (i-1)-th layer is inspected by impressing a potential as required. CONSTITUTION:Logical circuits 1, 2, and 3 are laminated in the order of (i-1), (i), and (i+1). Nodes N1-N3 of the input signal from the layer 3 to the layer 2 are connected to the same pad 6. In this case, no input of all the logical circuits is open. When signals of high potential are impressed on the inspection pad 6 by connecting power sources and grounds for every layer, a gate NAD1 becomes equivalent to an inverter, and a three-input gate NAD2 equivalent to a two-input gate; besides, a gate NOR1 to which the output of IV1 has been connected becomes equivalent to the inverter. When a signal is given to each input pad 4, the output corresponding to the logic up to the i-layer 2 appears in the pad by its combination. If it is different from an expected logical value, it is judged as defective below the i-layer 2, and the manufacture of after (i+1)-layer is stopped. This construction enables the reduction in cost by shortening the time for manufacture and inspection.
申请公布号 JPS60210852(A) 申请公布日期 1985.10.23
申请号 JP19840066949 申请日期 1984.04.04
申请人 MATSUSHITA DENKI SANGYO KK 发明人 TANIGUCHI TAKASHI;TSUJI KAZUHIKO;SUGANO MASAHIDE;SHIYOUREN SHIROJI
分类号 H01L21/66;H01L21/3205;H01L21/82;H01L21/822;H01L23/52;H01L27/04 主分类号 H01L21/66
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