发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain a semiconductor integrated circuit device having backup identification function by providing a complementary MOS inverter circuit comprising a P-channel MOSFET and an N-channel MOSFET. CONSTITUTION:The complementary CMOS inverter circuit activated by the same power supply voltage as that for an internal circuit (static RAM, SRAM) and comprising the P-channel MOSFETQ3 and the N-channel MOSFETQ4 is provided. When a system power supply voltage Vcc is applied, since the level of the input to the CMOS inverter circuit is brought into a high level via a Q1, its output signal goes to a low level. Thus, the output signal of an OR gate G1 is brought into a level according to the level of a chip selection signal CS. When the power supply is interrupted, the output signal of the CMOS inverter circuit goes to a high level, the chip selection signal is brought forcibly into the chip non-selection state of high level to attain backup.
申请公布号 JPS60211524(A) 申请公布日期 1985.10.23
申请号 JP19840067691 申请日期 1984.04.06
申请人 HITACHI SEISAKUSHO KK 发明人 SATOU KATSUYUKI
分类号 H02J1/00;G06F1/00;G06F1/26;G11C11/34;G11C11/413 主分类号 H02J1/00
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