发明名称 IN-PHASE VOLTAGE ELIMINATION CIRCUIT FOR HALL ELEMENT
摘要 <p>IN-PHASE VOLTAGE ELIMINATION CIRCUIT FOR HALL ELEMENT An in-phase voltage elimination circuit in which a Hall element has first and second control current input terminals and first and second output terminals, the first and second control current input terminals fed with a control current and the first output terminal connected to one input terminal of an operational amplifier. The other output of the operational amplifier is connected to ground, and the output terminal of the operational amplifier is connected to one of the first and second control current input terminals. A Hall output is produced at the second output terminal of the Hall element.</p>
申请公布号 CA1195735(A) 申请公布日期 1985.10.22
申请号 CA19810390760 申请日期 1981.11.24
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 MATUI, KUNIHIKO;TANAKA, SHIKEI
分类号 G01R17/06;G01R21/08;G01R33/07;(IPC1-7):G01R33/06 主分类号 G01R17/06
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