发明名称 ASYNCHRONOUS DATA BUS SYSTEM
摘要 <p>An active data bus is disclosed comprising a plurality of multiplex terminals serially interconnected to form a closed loop. Each terminal is capable of assuming a relay configuration wherein data signals received from a preceding terminal are retransmitted to a succeeding terminal, and of assuming a transmit access configuration wherein the loop is opened at the terminal and locally-generated data signals are introduced therein. Each terminal is further capable of functioning in a diagnostic mode whereby system access is obtained by programmed action of the terminal's control microprocessor, and of functioning in a highly efficient user access mode whereby access is obtained without microprocessor action by virtue of hardware "capturing" a special access window bit introduced by the lastaccessing terminal. Unique circuitry permits this lastaccessing terminal to close the loop after introducing its data but before the access window has completely traversed the system. The access window is thereupon "trapped" on the closed loop and continuously circulates thereafter until it is "captured" by the next terminal desiring access. In accordance with a preferred embodiment of the invention, the data bus includes redundant data paths between terminals and the terminal control microprocessors are each capable of selecting either of two receiving paths and either of two transmitting paths in order to form the closed loop. The programs of the terminal control microprocessors include cooperative diagnostic controller and diagnostic follower algorithms wherein the plurality of microprocessors intercommunicate synchronously via the diagnostic mode to construct an optimum data loop from available system resources. After constructing said loop, the member terminals collectively switch to the user access mode to asynchronously transfer data generated by user data sources directed to user data sinks. The cooperative diagnostic algorithms are initially entered upon applying power to the system and may be re-entered at a later time if certain status signals monitored by a terminal control microprocessor indicate that such action is necessary to efficiently maintain communication.</p>
申请公布号 CA1195750(A) 申请公布日期 1985.10.22
申请号 CA19820409258 申请日期 1982.08.11
申请人 FMC CORPORATION 发明人 CHAMPLIN, KEITH S.;PREIMESBERGER, ERNEST C.;MILLER, GEORGE W.
分类号 H04L12/433;H04L12/437;(IPC1-7):H04L5/14 主分类号 H04L12/433
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