| 摘要 |
PURPOSE:To attain stable and normal input even when a synchronizing signal such as a VTR input is an unstable video signal by sampling a video signal, applying A/D conversion to the sampling data and transferring it to a picture bus. CONSTITUTION:The video signal VIDEO from an ITV camera or a VTR is led to an input amplifier 21 and a synchronizing separator circuit 22. A horizontal synchronizing signal (H-SYNC) 1 from the synchronizing separator circuit 22 is fed to a timing detecting section 23 and the H-SYNC2 subject to timing shift and masking is fed to a PLL circuit 33. An H-SYNC3 subject to phase locking with the H-SYNC2 inputted by the PLL circuit 33 is fed to a synchronizing oscillator 43 and a sampling clock CLK is fed from the synchronizing oscillator 43 to an A/D converter 44. Thus, the output signal from the input amplifier 21 is subject to A/D conversion and the A/D-converted data is inputted to a picture processing unit via a picture bus 45 by the control of an interface circuit.
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