发明名称 CASSETTE FOR SSMICONDUCTOR WAFER ACCOMMODATION
摘要 PURPOSE:To enable to simultaneously accommodate a wafer of larger diameter for product and a wafer of a smaller diameter for test piece in the title cassette by a method wherein grooves, which are used for inserting the semiconductor wafer of a larger diameter for product in the cassette, and grooves, which are used for inserting the wafer of a smaller diameter for test piece in the cassette, are respectively formed in the mutually opposing inner wall surfaces of both sidewall parts of the cassette, and at the same time, the lowest edge parts of both wafers are formed in such a way as to position in the same height. CONSTITUTION:Numerous first grooves 10, which are used for inserting a semiconductor wafer W1 of a larger diameter for product in a cassette 8, have been formed in the mutually opposing inner wall surfaces of both sidewall parts 9 of the cassette 8, and at the same time, numerous second grooves 11, which are used for inserting a semiconduct or wafer W2 of a smaller diameter for test piece in the cassette 8, have been formed as well in the cassette 8. Moreover, the semiconductor wafer W1 for product and the semiconductor wafer W2 for test piece have been formed in such a way as to position in the same height substantially. As a result, the semiconductor wafer for product and the semiconductor wafer for test piece can be rotated and driven by a roll R at the same time in an etching process and so forth.
申请公布号 JPS60207347(A) 申请公布日期 1985.10.18
申请号 JP19840062161 申请日期 1984.03.31
申请人 TOSHIBA KK;TOUSHIBA MAIKON ENGINEERING KK 发明人 YOSHIKAWA KIYOSHI;MINOBOSHI TOMIO
分类号 H01L21/67;H01L21/673;H01L21/68;(IPC1-7):H01L21/68 主分类号 H01L21/67
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