发明名称 Processing apparatus with hierarchical structure.
摘要 <p>According to a processing apparatus with a hierarchical structure, a machine instruction (89) has a hierarchical structure of a task level operation code (91), a control structure level operation code (93), an arithmetic level operation code (95) and a low order level operation code (97), and accordingly an operation object field has a hierarchical structure of task level data (99), control condition data (101), arithmetic object data (103) and low order level data (105). In correspondence with the hierarchical structure of the instruction, the processing apparatus has a hierarchical structure of task level functional blocks (113), control structure level functional blocks (129), arithmetic level functional blocks (131) and low order level functional blocks (133). The functional blocks respectively have instruction decoders (135, 149, 151 and 153) which are operated with serial or parallel processing.</p>
申请公布号 EP0158320(A2) 申请公布日期 1985.10.16
申请号 EP19850104279 申请日期 1985.04.09
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIRAISHI, HAJIME C/O PATENT DIVISION
分类号 G06F9/30;(IPC1-7):G06F9/44 主分类号 G06F9/30
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