| 摘要 |
PURPOSE:To grasp clearly one cycle of data by displaying delimiter data for one cycle of data when data is displayed cyclically successively at every switch operation. CONSTITUTION:The output of an oscillator 7 is divided by a frequency dividing circuit 8 and is given to a timing signal generating circuit 9, and various fundamental timing signals are given to a ROM10, a RAM11, an instruction decoder 12, and an address control part 13. An operating part 14 operates time counting data in accordance with a microprogram from the ROM11 and stores the result in the RAM11, and data from the RAM11 is converted to display data by a decoder 15 and is displayed on a display part 2. When data is displayed cyclically successively at every switch operation in an input part 16, delimiter data is displayed in the display mode different from the data display mode if data is circulated once. |
