发明名称 TIMING CIRCUIT
摘要 <p>PURPOSE:To output a stable timing signal by decreasing the gain of a limiter amplifier when an input level of the amplifier is lowered out of a specified range so as to prevent the oscillation stability from being deteriorated because of the decrease in the input level. CONSTITUTION:An output of a waveform shaping circuit 5 built in a regenerative repeater is inputted to a band-pass filter 3 and an identification regenerating circuit 6. The output of said filter 3 is fed to a limiter amplifier 4 and inputted to a gain control circuit 8. When the input level of the amplifier 4 is lowered below than the specified range, the output of the control circuit 8 controls the gain of the amplifier 4 so as to decrease the output of the amplifier 4 and the result is fed to the identification regenerating circuit 6. Thus, the oscillation stability is prevented from being deteriorated because of the input level decrease and a stable timing signal is outputted.</p>
申请公布号 JPS60204139(A) 申请公布日期 1985.10.15
申请号 JP19840059920 申请日期 1984.03.28
申请人 NIPPON DENKI KK 发明人 AOKI EIJI
分类号 H04L25/52;H04L7/027 主分类号 H04L25/52
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