发明名称 DATA PROCESSING SYSTEM
摘要 PURPOSE:To facilitate a self-clock by performing coding and decoding after securing the correspondence between 8-bit data and a prescribed 16-bit code according to the code state. CONSTITUTION:A table to which a prescribed 16-bit code is written according to the code state is stored in a ROM102. When the data series are supplied to a shift register 100 from an input terminal (a), the table and the address corresponding to the data are designated with the ROM102. Then the ROM102 reads a 16-bit code out of an address of the designated table to supply it to a shift register 103 and delivers it through a code output terminal (b). Thus adverse conversion is performed in a decoding mode after the coding is through. As a result, the minimum reverse interval is set at 1.5T together with the maximum reverse interval and the detection window width set at 5.5T and 0.5T respectively (T: data bit interval). This facilitates a self-clock.
申请公布号 JPS60203022(A) 申请公布日期 1985.10.14
申请号 JP19840059197 申请日期 1984.03.27
申请人 CANON KK 发明人 TOKUUME YOSHIHIRO;TSUJII SHIGEO;KUROSAWA KAORU
分类号 G11B20/14;H03M5/14;H03M7/14 主分类号 G11B20/14
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