发明名称 FREQUENCY MULTIPLYING CIRCUIT
摘要 PURPOSE:To obtain a desired multiplied pulse output of an input pulse by integrating and storing the pulses obtained by dividing a reference pulse by the desired multiplied value at an input pulse interval for each input pulse and then dividing a reference clock by said stored value. CONSTITUTION:A periodical input pulse fIN sets a latch circuit 9 in a rise mode via a Schmitt circuit 2 and a monostable multivibrator 3. At the same time, a counter 8 is reset by a pulse which is delayed by a time produced by a monostable multivibrator 4 via a delay circuit 5. Therefore the contents of the counter 8 obtained immediately before the rise of an input pulse are latched by the circuit 9. The counter 8 integrates a pulse f' obtained by dividing a reference pulse of a frequency f0 by a desired number (n) for each cycle of the input pulse. This integrated value is latched by the circuit 9 for each output pulse given from the mono-multi 3 and divided by the integrated value with which the frequency f0 is latched through a division circuit 10. Then a pulse obtained by n- multiplying the input pulse is delivered from an output fOUT.
申请公布号 JPS60201719(A) 申请公布日期 1985.10.12
申请号 JP19840058605 申请日期 1984.03.27
申请人 OVAL KIKI KOGYO KK 发明人 MISUMI KATSUO;HAYASHIDA MITSUMORI
分类号 H03K5/00 主分类号 H03K5/00
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