发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enable to attain high yield and high reliability of a CMOS.LSI by a method wherein wirings to connect semiconductor elements are constituted of the three layer construction of a lowermost layer wiring consisting of a high melting point metal or a high melting point metal silicide, a middle layer wiring consisting of a polycrystalline Si layer diffused with N type impurities, and an uppermost layer wiring consisting of an Al layer or an Al-Si layer. CONSTITUTION:A shallow diffusion layer 6 formed in an Si substrate 5, and a wiring having the three layer construction consisting of a high melting point metal layer 8, an N type polycrystalline silicon layer 9 and an Al layer 10 are connected through a contact hole formed in a layer insulation film 7. The lowermost layer of the wiring is formed of a high melting point metal such as tungsten, titanium, molybdenum or the silicide layer thereof. Because the second layer N type polycrystalline silicon layer 9 has favorable step coverage, disconnection is not generated even at the contact hole formed in a fine type and having a steep step difference. Because the Al layer or an Al-Si layer is formed at the uppermost layer, resistance, of the wiring and reliability in regard to wire bonding are the same as usual. Accordingly, the wirings of an LSI having superior resistance to electromigration, and to generate hardly disconnection can be realized.
申请公布号 JPS60201655(A) 申请公布日期 1985.10.12
申请号 JP19840059113 申请日期 1984.03.27
申请人 SUWA SEIKOSHA KK 发明人 KATOU TATSUMASA
分类号 B32B7/06;H01L21/3205;H01L21/8234;H01L23/52;H01L23/532;H01L27/088;H01L29/78 主分类号 B32B7/06
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