发明名称 ACCUMULATOR
摘要 PURPOSE:To omit a decoder by delivering only the absolute value information through an output group of a numerical bit circuit and using a code bit circuit consisting of a latch circuit exclusive for code data in terms of codes and then controlling the numerical and code bits independently of each other. CONSTITUTION:A numerical bit circuit 15 consists of an up-down counter and counts up or down clocks by the output of an up-down deciding circuit 18. A code bit control circuit 16 detects that the count value is set at ''0''. In this case, a code bit output terminal 22 of a code bit circuit 17 is set at ''0'' if the up-data is applied to a control input terminal 20. Thus a positive code is obtained. While the circuit 15 counts up the clocks. When the down-data is applied to the terminal 20, the terminal 22 is set at ''1'' to obtain a negative code. Then the circuit 15 performs a count-up action under the control of the circuit 18. Thus the absolute value increases in a negative number.
申请公布号 JPS60201722(A) 申请公布日期 1985.10.12
申请号 JP19840057300 申请日期 1984.03.27
申请人 TOSHIBA KK 发明人 ANAI KIMIO;HIRATA TOORU
分类号 H03K23/00;H03K23/56 主分类号 H03K23/00
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