发明名称 INTERRUPTION CONTROLLING SYSTEM
摘要 PURPOSE:To prevent an unnecessary delay of an interruption which requires urgent processing, by providing a means for inhibiting an interruption only at a necessary time, and resetting a device automatically so as to be interruptable after a designated time has elapsed, on a microprogram control information processing device. CONSTITUTION:As for a control storage device 1, the contents of an address designated by an address register 2 are read out to a register 3 and executed. In case of an interruption, a start address of an interruption processing microprogram is set to the address register 2 under control of an interruption controlling circuit, and a micro-instruction is set to the register 3. The micro-instruction is decoded by a decoder 4, and a signal 5 being a part of its output is activated, when an interruption inhibiting micro-instruction is set to the register 3. A time length in which it is necessary to inhibit an interruption is set as a bit of a part of the micro-instruction to a counter 7 through a transfer line 6, subtracted by a clock pulse, and when all bits become ''0'', a mask signal 9 becomes ''1'', and an interrupting signal is outputted from a gate 10.
申请公布号 JPS60201438(A) 申请公布日期 1985.10.11
申请号 JP19840057621 申请日期 1984.03.26
申请人 FUJITSU KK 发明人 MOROHASHI MITSUO;KIKUCHI NOBUYUKI
分类号 G06F9/22;G06F9/46;G06F9/48 主分类号 G06F9/22
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