| 摘要 |
The most significant adjustment bit inputs of an adjustable frequency down-converter (PSC, Z1, Z2), which is located in the control loop of an adjustable phase-locked frequency generator, for the output signal of a voltage-controlled oscillator (VCO), are connected via a digital/analog converter (DAC), in addition to the output of a frequency and phase comparator (PV) for the output signal of a reference oscillator (RO) and the frequency-divided output signal of the voltage-controlled oscillator (VCO), to a control input of this oscillator (VCO) for reducing the correction time. The invention is applied in frequency and time base circuits for digital measuring instruments. <IMAGE>
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