发明名称
摘要 PURPOSE:To obtain a highly economical multimemory driving method by using a buffer for wriring and an erase data register for erasing by all memory in common. CONSTITUTION:Address signals are supplied to the address signal input terminal (a) of memory elements 1a-1d from the starting time of a period T2 which is a half of period T, and the data of an erase data register 4 are supplied to data input terminal (d) of memory elements 1a-1d. The contents of memory of the memory elements are erased by this action. Address signals are continuously supplied to the address signal input terminal (a) from the erasing period T2. Consequently, the data of address corresponding to the address signal is read from the memory element and reading is performed from an output terminal OUT through a P/S cover 2 etc. By this way, one erase register and one bus driver can be used by all memory elements in common and economical efficiency can be enhanced.
申请公布号 JPS6045495(B2) 申请公布日期 1985.10.09
申请号 JP19810105485 申请日期 1981.07.08
申请人 NIPPON DENKI HOOMU EREKUTORONIKUSU KK 发明人 INOSE TETSUO
分类号 G06F12/06;G09G5/397;G09G5/399;G11C7/00;G11C7/20;H04N7/00 主分类号 G06F12/06
代理机构 代理人
主权项
地址
您可能感兴趣的专利