发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To improve the data processing efficiency by transmitting an interruption signal to a CPU from a detection circuit within a chip when a collation of signals is produced in an external bus and therefore supplying a countermeasure from the CPU to attain the data reprocessing. CONSTITUTION:It is supposed that the collation of signals is produced on an external bus when the potential is set at H at a contact (c), i.e., the external bus is grounded by some reason. In such a case, the potential of the contact (c) drops and the minus side input of a comparator C1 is reduced less than the reference voltage VH. Therefore a signal of an H level is outputted from the comparator C1 and supplied to an AND gate A1. Then an H side collision detecting signal SSH is outputted by the H-level signal of the gate A1 and a signal of an H level sent from a junction (a) and sent to an OR gate 61. Then the gate 6 sends a collision detecting signal SS1 to an OR gate within the same chip, and this OR gate outputs an interruption signal to supply it to a terminal INT of a CPU10. Receiving this interruption signal, the CPU10 knows that the external bus has the collision of signals and processes data again.
申请公布号 JPS60200347(A) 申请公布日期 1985.10.09
申请号 JP19840054438 申请日期 1984.03.23
申请人 FUJITSU KK 发明人 MIYASHITA TAKUMI
分类号 G06F11/30;G06F11/07;G06F11/14 主分类号 G06F11/30
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