发明名称 BLOCK ADDRESS CORRECTING CIRCUIT
摘要 PURPOSE:To make a block address correction stronger by obtaining a majority of a difference signal between an output of a counter and a block address in the input data by a reference block signal and calculating a block address from the decision output. CONSTITUTION:Since a block address code added to a block each has a continuity, the difference between an output of a counter 13 counted up by a reference block signal and a block address in input data DIN is to be a constant value. The difference is obtained by a subtracter circuit 12 and the difference of a block address, to which influences of transmission errors are given, will not be able to go to a prescribed value. Then, by a majority logic circuit 16, the majority of a difference signal which is continuous, for example, concerning five blocks, is obtained, a correct difference is determined. The output of a counter 20 counted up by a block signal to the determining difference is added by an adder circuit 19 and the value of a block address is calculated. Consequently, even when error correcting code processing is not executed to a block address code, the block address can be sufficiently corrected.
申请公布号 JPS61131270(A) 申请公布日期 1986.06.18
申请号 JP19840253463 申请日期 1984.11.30
申请人 SONY CORP 发明人 YAMAMOTO YOSHIKAZU
分类号 G11B20/12;H03M13/27;H03M13/43 主分类号 G11B20/12
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