Analog data storage system.

摘要

A high speed data storage array is disclosed utilizing a cell design allowing high speed sampling of a rapidly changing signal. Each cell of the array includes two input gates (Q1, Q2) between the signal input and a storage capacitor (20). The gates are controlled by a high speed row clock (12) and low speed column clock (28) the instantaneous analog value of the signal being sampled and stored by a cell on coincidence of the two clocks.