| 摘要 |
PURPOSE:To obtain automatically the envelope of input signals having higher frequency components than the sampling frequency of the AD converter, by installing a holding circuit for each of the maximum value and minimum value which are periodically reset synchronously with the sampling clock. CONSTITUTION:The titled storage device is equipped with a maximum value holding circuit 3 and a minimum value holding circuit 4, which are periodically reset synchronously with the sampling clock, and analog signals are impressed upon AD converters 9 and 10, respectively, through the circuit 3 and 4. The maximum value and the minimum value of the analog signals are simultaneously or alternately AD-converted at every sampling clock, and envelopes are detected for analog signals having higher frequency components than the frequency of the sampling clock. |
