发明名称 FUZZY LOGICAL CIRCUIT
摘要 PURPOSE:To offer a basic circuit suitable for the fuzzy logic by connecting a wired OR to an output of a current mirror whose input consists of an FET and an input current source. CONSTITUTION:The limit difference circuit consists of the current mirror 1 comprising a P-MOSFET, wired OR, diode 2, two current source 3, 4 and an output terminal 5. The current source 3 having a sweep-out current Ix and the output terminal 5 via a diode 2 in opposite polarity to the sweep-out direction of the current mirror 1 are connected to the output drain. Since the current Ix is drawn by the current source 3, an output current of Iz=Ix-Iy is sucked through the diode 2 from the terminal 5 when the relation of Ix>Iy exists. In case of Ix<=Iy, the output current of Iy-Ix is about to be flowed forcibly, since it is blocked by the diode 2, the current flowing to the terminal 5 is zero.
申请公布号 JPS60199228(A) 申请公布日期 1985.10.08
申请号 JP19840057121 申请日期 1984.03.23
申请人 TATEISHI DENKI KK 发明人 UENO FUMIO;YAMAKAWA RETSU;SHIRAI YUUJI
分类号 H03K19/0944;H01L27/06;H03K19/00;H03K19/094;H03K19/20 主分类号 H03K19/0944
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