发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To attain ease of circuit integration by connecting the 1st and 2nd latch circuits provided with a clocked inverter in cascade and bringing the circuits both into input fatch state with a control signal so as to obtain an FF circuit having functions of information storage and signal-through. CONSTITUTION:An input signal D is applied to the 1st inverter circuit IV1 via the clocked inverter circuit CIV1 and its output is fed back to the input side from a clocked inverter circuit CIV2 of a positive feedback loop. The output of the 1st latch circuit is fed to the 2nd latch circuit comprising the inverter IV2 and clocked inverter circuits CIV3, 4. A clock signal CL is fed to the circuit CIV1 and the inverted (IV3) clock signal CL' is fed to the circuit CIV2. Moreover, an output of an AND gate G receiving the signal CL and the control signal C as inputs is fed to the circuit CIV3 and its inverting (IV4) signal is fed to the circuit CIV4. Then an MOSFET is used and an FF circuit having the functions of information storage and signal-through is constituted.
申请公布号 JPS60198916(A) 申请公布日期 1985.10.08
申请号 JP19840054292 申请日期 1984.03.23
申请人 HITACHI MAIKURO COMPUTER ENGINEERING KK;HITACHI SEISAKUSHO KK;HITACHI DEBAISU ENGINEERING KK 发明人 TANAKA SHINJI;OOMURA MAKOTO
分类号 H03K3/037;(IPC1-7):H03K3/037 主分类号 H03K3/037
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