发明名称 ECL Circuit for forcibly setting a high level output
摘要 An ECL circuit includes a differential pair of transistors, a set transistor, and a set resistor connected between the emitters of the differential pair of transistors and the emitter of the set transistor. The output of the ECL circuit can be fixed securely to a "high" level only by applying a "high" level signal having the same level as the "high" level signal of the data input to the base of the set transistor.
申请公布号 US4546272(A) 申请公布日期 1985.10.08
申请号 US19830498727 申请日期 1983.05.27
申请人 FUJITSU LIMITED 发明人 SUZUKI, HIROKAZU;KOKADO, MASAYUKI
分类号 H03K3/2885;H03K5/24;H03K19/086;(IPC1-7):H03K19/086;H03K17/06;H03K19/003;H03K19/092 主分类号 H03K3/2885
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