| 摘要 |
PURPOSE:To prevent erroneous detection of frame synchronizing position by providing a gate betweeen a reception circuit and a synchronism detecting circuit and opening the gate when a blank section till the start of the next frame succeeding to the data frame in the frame is detected. CONSTITUTION:When a decoded signal (a) enters the blank period Bi, since an output Q of a D flip-flop D.F/F13 is at logical level ''0'' at the supervision of a control circuit 14, the control circuit 14 outputs no clear pulse signal (p) and brings a control signal (c) to logical level ''1'', then opens the gate 12 and the decoded signal (a) outputted from the reception circuit 10 is fed to a synchronism detection circuit 11. Since the gate 12 is opened at the blank period Bi of a frame Fi in such a way, the synchronism detection circuit 11 starts detection of the synchronism from the head of a DFi+1 of the data frame of the next frame Fi+1, in other words, from the head of the synchronizing information S of the next frame Fi+1 thereby detecting the frame synchronizing position surely without any error. |
