Planarization of dielectric films on integrated circuits

摘要

A method for planarizing dielectric films between conductive layers on semiconductor wafers is disclosed. Two successive dielectric layers are deposited over a pattern on a wafer and coated with a polymer which has a substantially flat surface. Planarization is obtained when the wafer is plasma etched with the etch rate of the polymer equal to the etch rate of the second dielectric layer. The etch is stopped when all of the polymer has been removed from the wafer. Selectivity in etch rates between the first and second dielectric layers reduces the problems of nonuniformities and the formation of pin holes in the first dielectric layer.