| 摘要 |
<p>PURPOSE:To suppress the useless electric current consumption of a data processor so as to reduce the power consumption of the data processor, by stopping the supply of clock signals to actually non-used peripheral circuits out of the peripheral circuits of the data processor. CONSTITUTION:A clock generating circuit CPG generate highly accurate reference frequency signals by utilizing an externally fitted crystal oscillator 2 X-tal and forms clock signals in accordance with the reference frequency signals. The clock signals in accordance with the reference frequency signals. The clock signals are supplied to a CPU. Clock signals phi0-phi3, etc., formed to peripheral circuits are respectively supplied to prescribed peripheral circuits through AND gate circuits. Hereupon, control signals S0-S2 corresponding to non-used peripheral circuits are set to a logic ''0'' at the initialization of the data processing program, and so forth. Therefore, AND gate circuits G0-G2 close their gates and the clock signals phi0-phi2 are not supplied to the non-used peripheral circuits. As the result of this arrangement, operations of non-used peripheral circuits are stopped and useless electric current consumption is inhibited.</p> |
