| 摘要 |
PURPOSE:To obtain the titled device of high density necessitating no wide areas by a method wherein charges are given and received between the first and second gate electrodes by making Cd larger than Cu, and memory transistors are formed in a groove and around it. CONSTITUTION:The first thin gate oxide film 15 is formed on the inner wall of the groove 13 and on the surface of a substrate 11 by thermal oxidation, and a polycrystalline Si film is buried in the groove 13 by being deposited over the whole surface; thereafter, the unnecessary parts are etched, thus forming a floating gate 16 buried in the groove 16 via first gate oxide film 15. Next, the second thin gate oxide film 17 is formed on the surface of the floating gate 16 by thermal oxidation. After deposition of a polycrystalline Si film over the whole surface, a control gate 18 is formed by patterning. After successive deposition of an interlayer insulation film 19 over the whole surface, a contact hole not illustrated is bored; further, a wiring metal is evaporated over the whole surface. Thereafter, a wiring not illustrated is formed by patterning and thus the EEPROM cell is produced. |
