发明名称 Control arrangement for the access by a central processing unit to a frame buffer for character representations
摘要 A control arrangement for the access by a central processing unit (4) to the frame buffer (1) for character representations which can be assembled from sequences of pixels, by progressively calling up memory addresses (10), the frame buffer (1) being composed of part-buffers (1a) allocated to different pixel attributes, is to be designed for enabling information to be rapidly changed in the frame buffer (1). For this purpose, each memory address (10) is equipped, in addition to its location identification part (11) with the information on the location of representation of a stored pixel sequence information item, with an image attribute part (9) which comprises the same number of binary locations as there are part-buffers (1a) in the frame buffer (1). Each binary location of the image attribute part (9) is permanently allocated to one of the part-buffers (1a), so that the bit pattern of the image attribute part (9) specifies a memory address (10), which has been selected by the part-buffer (1a), in order to be able to write into it, for example, changed pixel information from the central processing unit (4) in parallel under the instantaneous local address (2) of the memory address (10). This makes it possible to address any number of the existing part-buffers (1) within a single access cycle, namely address via the instantaneous bit pattern of the image attribute part (9) of the currently given memory address (10). <IMAGE>
申请公布号 DE3410933(A1) 申请公布日期 1985.10.03
申请号 DE19843410933 申请日期 1984.03.24
申请人 CTM COMPUTERTECHNIK MUELLER GMBH 发明人 VERZICHT DES ERFINDERS AUF NENNUNG
分类号 G09G5/02;G09G5/30;G09G5/393;(IPC1-7):G06F3/147;G06F12/02;G06F13/10;G09G3/00 主分类号 G09G5/02
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