| 摘要 |
PURPOSE:To obtain a decoder circuit capable of removing the multiselect of an address by setting properly the threshold voltage of each logical gate circuit used for a decoder circuit. CONSTITUTION:Threshold voltages of an invertor circuit G31 of the 1st stage and an invertor circuit G33 of the 3rd stage are comparatively low, namely, set to a VTL. A threshold voltage of a NAND circuit G32 of the 2nd stage, that is, an even stage, is comparatively high and set to a VTH. When the threshold voltage of a transistor alone is determined in process, the threshold voltage in a CMOS circuit is decided by a size ratio (r) of an N-channel transistor and an P- channel transistor. For instance, in case of a CMOS invertor, a threshold voltage is made smaller when the (r) is made larger, and vice versa. |
