发明名称 PIPELINE ARITHMETIC DEVICE
摘要 PURPOSE:To reduce a unit processing time by prefetching a part of the operation of a unit having a long processing time and executing it within a pipeline cycle having a margin of processing time. CONSTITUTION:The 1st and 2nd pipeline cycles 7 and 8 are set to execute data processing parts 9 and 10 in the cycle 7 and then data processing parts 11 and 12 in the cycle 8 respectively. The part 11 selects the output signal of the part 10 by means of a conditional signal line 13 and outputs the corresponding data. In the cycle 8 the data selected by the part 11 is executed by the part 12. In such a way, the pipeline cycle is reduced.
申请公布号 JPS60193045(A) 申请公布日期 1985.10.01
申请号 JP19840048709 申请日期 1984.03.14
申请人 NIPPON DENKI KK 发明人 KUSANO TAKAO
分类号 G06F9/38;G06F7/00 主分类号 G06F9/38
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