| 摘要 |
PURPOSE:To relieve the load of a microprocessor by allowing the microprocessor to read the change in a control signal only when an exclusive circuit detects the change in the control signal such as a line state display signal. CONSTITUTION:An exclusive circuit comprising a shift register SR12, an exclusive NOR circuit 14, an exclusive OR circuit 15 and an AND circuit 16 detects the level change in a digital signal of an input line 11. A line state display signal B from the line 11 is given to a data input terminal D of the SR12 and a gate circuit 18 and a clock A is given to a clock terminal CK of the SR12. Signals C-F delayed by a clock each are outputted from output terminals Q1-Q4 of the SR12. The signals C-E are inputted to the circuit 14 and the signals E, F are inputted to the circuit 15, the circuits output respectively a constant detection signal H and a detection signal G representing the level change of the signal B while the level of the signal B is in the 3 clock period and input an AND signal I of the signals H, G to a microprocessor muPC17. The muPC17 controls the circuit 18 to fetch the signal B.
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