| 摘要 |
PURPOSE:To switch the frequency characteristic of an integration circuit in response to a mode command signal by forming the titled circuit with a variable frequency dividing means, a gate means and an up-down counter. CONSTITUTION:A clock pulse S1 is frequency-divided at a prescribed frequency dividing ratio in response to the mode command signal at a variable frequency dividing means 4 and its frequency division output S2 is used as an input to the gate means 5. When an input digital signal D1 is coincident with a prescribed value D0, the gate means 5 inhibits the frequency division output S2 and when said signal D1 is dissident with the value D0, the output S2 is taken as a gate output S3, and is used as a clock input of an up-down counter 6. At least one bit of the most significant digit of the signal D1 is inputted to the counter 6 as an up-down signal and a gate output S3 is subjected to up or down count. Then an output digital signal D2 is obtained from the counter 6. Thus, the frequency characteristic of the integration circuit is switched in response to the mode command signal.
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