发明名称 TESTING SYSTEM OF LOGICAL LSI
摘要 PURPOSE:To efficiently and easily perform an AC test with less number of input- output terminals exclusively used for the test, by constituting a ring oscillating circuit utilizing a two-way input-output terminal and internal logical circuit. CONSTITUTION:At the time of normal operation, a test mode signal arriving through a pin 27 exclusively used for test is ''1'' and an output buffer 26 is under a disable condition. Therefore, a two-way terminal 21 acts an an input terminal only and an input signal is propagated so an internal circuit as Sig1. On the other hand, a signal supplied through the pin 27 at the time of test mode becomes ''0''. Therefore, an input buffer 25, inverter elements 28-2n, and ouput buffer 26 are coupled in a ring and function as a ring oscillating circuit. When an oscillating frequency is observed from the two-way terminal 21 by utilizing this, the AC characteristic of the internal circuit can be presumed easily.
申请公布号 JPS60192276(A) 申请公布日期 1985.09.30
申请号 JP19840047902 申请日期 1984.03.13
申请人 TOSHIBA KK 发明人 SHIBAZAKI KAZUYA
分类号 G01R31/28;G06F11/24 主分类号 G01R31/28
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