发明名称 DYNAMIC TYPE RANDOM ACCESS MEMORY
摘要 PURPOSE:To reduce the junction capacitance of the transfer transistor (TR) of a memory cell and the capacitance of a bit line, and further prevent a subthreshold leak current without deteriorating characteristics of said transfer TR by operating the bit line while shifting over constant voltage's share its low level potential to a word line potential when the memory cell is not selected. CONSTITUTION:The transfer TR has such characteristics that a current flows between the drain and source when the gate potential is equal to the source potential. For example, DELTAV is set to 0.6V and therefore V1=0.6V; each word line is at 0V at time t0 when unselected and the potential VB of a bias line B is a low level (0.6V). Then, the effective gate voltage of the transfer TRT of the memory cell 2 connected to the low-level bit line B is -0.6V and lower than its subthreshold voltage Vthsub(-0.3V), and said transfer TRT is cut off, thereby preventing its subthreshold leak current.
申请公布号 JPS60191499(A) 申请公布日期 1985.09.28
申请号 JP19840045202 申请日期 1984.03.09
申请人 TOSHIBA KK 发明人 UCHIDA YUKIMASA
分类号 G11C11/409;G11C11/407;G11C11/4094;(IPC1-7):G11C11/34 主分类号 G11C11/409
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