| 摘要 |
PURPOSE:To obtain an asynchronizing type static MOS memory device which is easily handled at a high speed and provided with low power consumption performance by generating a reference clock signal when any one of a read/ write signal and a data input signal is changed, and writing data in a memory cell on the basis of the reference clock signal. CONSTITUTION:When a chip selection input signal CS1' is turned to the low level, a chip is turned to the selected status and an address input signal 2 is changed, a reference clock signal 6 is generated at the detection of the change and a word line is turned to the high level for a fixed period. In said status, the information of a memory cell corresponding to a newly selected address is read out and the data are outputted. When the read/write signal WE' is turned to the low level and writing status, the information appearing the data output is rewritten as it is if the data input signal from a memory system is in the high impedance status (High-Z). |
