发明名称 MONOLITHIC INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To miniature an automatic clear circuit and to apply a monolithic IC to a desk electronic computer, etc., by providing a time constant circuit to the monolithic IC and performing a clearing action to the power supply voltage having a fast rise through said time constant circuit. CONSTITUTION:MISFETs Q1 and Q2 as well as FETs Q3 and Q4 which form a source follower circuit using the power supply voltage VDD as an input are provided to a monolithic IC. The output of this IC is supplied to an inverter circuit consisting of FETQ8 and Q6. The output of the inverter circuit is supplied to a time constant circuit consisting of FETs Q7-Q10. Then a capacitor C is charged with the VDD via FETs Q7-Q9 serving as resistance means respectively. Clocks phi1 and phi2 are applied to FETs Q8 and Q9 of said time constant circuit. Thus a time constant is substantially increased. In this case, the output of the time constant circuit is applied to FETs Q13-Q18 forming a latch circuit via a buffer circuit consisting of FETs Q11 and Q12. Thus a clearing action is accelerated by the time constant circuit, and an automatic clear circuit is miniaturized.</p>
申请公布号 JPS60191323(A) 申请公布日期 1985.09.28
申请号 JP19840248104 申请日期 1984.11.26
申请人 HITACHI SEISAKUSHO KK 发明人 MASUDA KENZOU
分类号 G11C11/41;G06F1/00;G06F1/24;G11C11/34;H03K17/22 主分类号 G11C11/41
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