| 摘要 |
PURPOSE:To use a queuing memory efficiently by converting outputs from read and write counters by an address conversion table and controlling the contens of the table by an address control part in a queuing circuit of a data flow type computer. CONSTITUTION:A variable name conversion part 1 converts a variable name 100 added to data 49 into a new variable name 101 and a data matching flag 104 on the basis of a variable name conversion table. A read/write control part 2 controls the writing of data 49 in a queuing memory 8 or the reading data to be the pair of the data 49 from the memory 8 in accordance with the variable name 101 and the flag 104. The read and write counters 3, 4 store respective addresses of the memory 8 and the contents of both the counters 3, 4 are alternately switched by a multiplexer 5 and outputted to the memory 8 and an address conversion part 6. The conversion part 6 forms the upper bit of an address of the memory 8 from the upper bit of an output from the multiplexer 5 and the variable name 101 on the basis of its internal conversion table. The table is rewritten by a control part 7. |
