发明名称 INTEGRATED BIPOLAR-MOS SEMICONDUCTOR DEVICE WITH COMMON COLLE CTOR AND DRAIN
摘要 <p>The safe operating area can be increased and the die area can be decreased for a monolithic Darlington circuit employing an MOS input transistor (10) and bipolar output transistor (15) by subdividing the bipolar transistor (15) into a multiplicity of rectangular spaced apart bipolar device regions (31), each of which is surrounded by an annular shaped MOS device region (32). The source (44) and channel (43) of the MOS devices are formed in an extension (42a) of the base (42) of the bipolar devices (31). The substrate (40) serves as a common collector for all the bipolar device regions (31) and as a common drain for all the MOS device regions (32). The gate electrode (47), which runs over the interstices between the parallel spaced apart bipolar device areas (31) is covered by an insulator (50) so that the emitter metallization (36) may extend substantially over the entire upper surface of the die. A more compact layout and better thermal coupling between the MOS and bipolar devices are obtained. These features reduce the total die area and improve the thermal stability of the circuit.</p>
申请公布号 WO1985004285(A1) 申请公布日期 1985.09.26
申请号 US1985000096 申请日期 1985.01.22
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