发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To set optionally and easily a range of reception time points by setting previously the interruption inhibiting signals to each interruption signal train as well as a data train together with the control information on an output relay and then transmitting the interruption signal to a central processor only in a stop mode of the interruption inhibiting signal. CONSTITUTION:A sequence controller executes programs through a central processor 1 according to a data train and a program stored in a memory 2 and sets the output port 5 at a time point decided the data train to actuate an output relay 6 and to control the external control load. As shown in a figure, the data train contains the time point information 8, the output relay control information 9 and the interruption inhibition information. The outputs of interruption inhibiting signals are set to 0 (permission of interruption) to corresponding interruption signals 1 and 2 only in a time range for reception of interruption and otherwise set at 1 (inhibition of interruption). Thus a range of reception time point for interruption can be set optionally and individually.
申请公布号 JPS60186903(A) 申请公布日期 1985.09.24
申请号 JP19840040363 申请日期 1984.03.05
申请人 HITACHI SEISAKUSHO KK 发明人 TANAKA TOSHIYUKI
分类号 G05B19/05;G05B19/042 主分类号 G05B19/05
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