| 摘要 |
<p>21 "DYNAMIC TWO-PHASE CIRCUIT ARRANGEMENT" As shown in Figure 6, a dynamic two-phase circuit arrangement comprises two flip-flops (601 and 602) each of which has an input stage (transistors 605/606 and 613/614), a non-inverting output stage (transistors 608/609 and 616/617) and an inverting output stage (transistors 610/611 and 618/619). Two-phase control of the two flip-flops (601 and 602) is effected by drive pulses K1 and K2. The arrangement also includes combinatorial logic (603) which is operated by the drive pulses K1 and K2 to feed counter clock pulses CP to the first flip-flop (601). The flip-flop (601) performs a divide-by-two operation in response to the clock pulses CP and drives the flip-flop (602) from its Q-output. The flip-flop (602) includes an additional switching transistor (620) which is also driven from the Q-output of the flip-flop (601). This transistor (620) is connected to perform an OR-function with the non-inverting output stage (transistors 616/617) of the flip-flop (602). As a result, this output stage produces shift pulses S having half the repetition frequency of the clock pulses CP. The duration of these shift pulses corresponds to the period of the two-phase control cycle (K1, K2) of the arrangement.</p> |
