发明名称 GENERATION OF CYCLIC PATTERN
摘要 PURPOSE:To produce easily a test pattern for transition of states by storing patterns to be produced after dividing them into the 1st patterns which are transmitter only one time and the 2nd patterns which are produced repetitively after said 1st patterns. CONSTITUTION:A start signal MS is set at ''1'' in a pattern transmission mode. Then a load address selector 6 and a load signal register 7 deliver the contents of a cyclic address register 1 and the output CO of a comparator 5 respectively. A pattern memory 4 transmits the contents of an address shown by an address counter 3 at the same speed as a counter clock CC. The comparator 5 compares the output of the counter 3 with the contents of an end address register 2. When the coincidence is obtained from said comparison, the output CO is set at ''1''. Thus a cycle address is set to the counter 3, and patterns are transmitted continuously.
申请公布号 JPS60186945(A) 申请公布日期 1985.09.24
申请号 JP19840040307 申请日期 1984.03.05
申请人 HITACHI SEISAKUSHO KK 发明人 SHIMIZU KOUICHI
分类号 H04L1/00;G06F11/22;G06F11/263;G11C29/10;H03K3/78;H04L25/02 主分类号 H04L1/00
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