发明名称 REGENERATING CIRCUIT FOR BIT TIMING
摘要 PURPOSE:To discriminate a base band signal in the best phase by supplying a regenerated bit timing signal to an identifier which identifies a base band obtained by demodulating a phase-modulated signal with a phase control signal from the identifier. CONSTITUTION:The bit timing BT of a base band signal applied to a terminal 40 is extracted by an extracting circuit 28 for the bit timing BT and applied to a phase locked part 29. The locked part 29 is controlled through a phase-locked loop so that a voltage-controlled oscillator 25 synchronizes with the BT signal, and the output of the oscillator 25 is applied to a phase control part 30. The phase control signal applied from the identifier to a terminal 41 is a digital signal which varies in the duty factor of pulses with a phase controlled variable and this is integrated by a voltage converter 31 to extract a DC component corresponding to the duty factor. The varactor diode 301 of the control part 30 is controlled with the DC signal and the phase of the signal from the oscillator 254 is rotated; and the signal is converted by a converter 27 into a digital signal, which is supplied from a terminal 42 to the identifier as the best reproduced BT signal for the identification of the base band.
申请公布号 JPS60186146(A) 申请公布日期 1985.09.21
申请号 JP19840041589 申请日期 1984.03.05
申请人 FUJITSU KK 发明人 TAKEDA YUKIO;FUKUDA EISUKE;SASAKI SUSUMU
分类号 H04L7/033 主分类号 H04L7/033
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