发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To improve the reliability by forming a 2-layer structure that a base layer is made of a high impurity density layer and a drain region side low impurity density layer, preventing a punch-through phenomenon between the source and the drain and decreasing the base resistance and increasing the breaking strength. CONSTITUTION:An n type epitaxial layer 2 (having 35mum of thickness, 2.0OMEGA.cm of specific resistance) is formed on an n type silicon substrate 1 as a semiconductor substrate. A gate insulating film 3 has 130mum of thickness, a polycrystalline silicon layer having 0.4mum of thickness is formed thereon, and processed as a gate electrode 4. With the electrode 4 as a mask, base layer 5, 6 are formed. This base layer 5 is a p type low impurity density region, and has 6mum of depth, 1X10<16>cm<-3> of surface density. Numeral 6 designates a p type high impurity density region which has 2mum of depth and 3X10<17>cm<-3> of surface density. A source region 7 formed in the base layer 6 is an n type high impurity density layer which has 0.5mum of depth and 2X10<19>cm<-3> of surface density. Numerals 8, 9 designate source and drain electrodes, respectively.
申请公布号 JPS60186068(A) 申请公布日期 1985.09.21
申请号 JP19850015421 申请日期 1985.01.31
申请人 HITACHI SEISAKUSHO KK 发明人 YOSHIDA ISAO;OKABE TAKEAKI;KATSUEDA MINEO;NAGATA MINORU
分类号 H01L29/08;H01L21/336;H01L29/10;H01L29/78 主分类号 H01L29/08
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