发明名称 MUTING CIRCUIT
摘要 PURPOSE:To improve the reliability and to miniaturize the titled circuit by using a circuit for time constant circuit at power supply ON and a capacitor for integration circuit at power supply OFF in common so as to constitute an electronic muting circuit. CONSTITUTION:A constant current source 1a charges a capacitor C at power ON, a level detection circuit 5 detects a potential at a point A, and when the potential reaches a voltage V1 decided by a muting time t1, an output signal is generated from a level detection circuit 5 and a Schmitt circuit 6 and operates gate circuits 2a, 2b nearly at the same time. Thus, the capacitor C is charged from a constant current source 1b in addition to the constant current source 1a by the gate circuit 2 and the potential rises with a larger slope. Further, an output of a pulse generating cirlcuit 3 is inputted to the gate circuit 2 by the operation of the gate circuit 2b and the output reaches a DC voltage +Vcc while being charged at a power supply voltage 0V. The gate circuit 2b is operated at power OFF even with a voltage of the muting level voltage V1, a signal of the pulse generating cirlcuit 3 is inputted to the gate circuit 2 so as to discharge the capacitor C.
申请公布号 JPS60185409(A) 申请公布日期 1985.09.20
申请号 JP19850006584 申请日期 1985.01.17
申请人 PIONEER KK 发明人 OZAWA AKIO
分类号 H03F1/00;H04B1/10 主分类号 H03F1/00
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