| 摘要 |
PURPOSE:To obtain a high speed logic circuit with low power consumption by coupling stages with a diode in case of the connection of two stages of direct coupling type logic circuits. CONSTITUTION:A drain voltage of a field effect TR (FET)12 is clamped by a voltage being the sum of a rising voltage of a gate-source of an FET16 and a voltage of a rising voltage of a diode 13. Since the high level is doubled than a conventional circuit, 1.2-1.6V of logical amplitude is obtained. Since a voltage is given dividedly to a diode formed with the diode 13 and a gate and source of the FET16 at ''0'' level, the FET16 halving the gate voltage in comparison with the conventional device is cut off completely. Moreover, when the power consumption is the same as the power voltage of a conventional example, the voltage is decreased by the share dividing the square of the diode rising voltage by a value of the resistor 11. |
