| 摘要 |
PURPOSE:To improve the processing performance on real time processing without increasing the hardware by allowing a memory mode designation flag corresponding to a block provided in a directory to be on/off-controlled by the software. CONSTITUTION:Cache memories 40, 50 have a copy of a part of data of a common memory 70 between processors 10, 20 and a common bus 60 respectively. In case of the read access at the memory access from the processors 10, 20, when a required data is provided in the cache memories 40, 50, the data is handed over to the processors. When the data does not exists, the said data is read from a common memory 70, given to the processors 10, 20 and stored in the cache memories 40, 50. In case of write access, when the data exists in the cache memories 40, 50, the cache memories 40, 50 and the common memory 70 are revised and when the data does not exist, only the common memory 70 is revised. |
