发明名称 DIGITAL CONVERGENCE CIRCUIT
摘要 PURPOSE:To obtain a digital convergence circuit without a multiplier by address- inputting the difference between the 1st line correction quantity and the 2nd line correction quantity and a position of scanning lines between data and by storing the correction quantity corresponding two quantities beforehand. CONSTITUTION:The correction quantity of a scanning line 1 and that of a scanning line 2 are added to a subtractor circuit 8, and difference data are added to a correction quantity ROM20. An output of a raster address generator circuit 4 is added to said ROM20 as an address input. Thus the same result as the multiplied one can be obtained from the correction quantity ROM20; therefore a multiplier circuit becomes unnecessary. Thus the correction quantity is calculated beforehand and stored in said ROM20. The correction quantity is added to that of the 2nd scanning line, held in D/A convertors 12-12''', and a current corresponding to these correction quantities passes in four types of convergence circuits.
申请公布号 JPS60182893(A) 申请公布日期 1985.09.18
申请号 JP19840038284 申请日期 1984.02.29
申请人 FUJITSU KK 发明人 NATSUME KIMIO
分类号 H04N9/28 主分类号 H04N9/28
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