发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 PURPOSE:To enable short-time programming and low-voltage programming by a method wherein the titled device is so constructed that threshold voltage of a channel region under a floating gate electrode may be controlled by the potential of a selective gate electrode and that of a floating gate. CONSTITUTION:Channel regions L1, L3, and L2 are formed in series between an N<+> type source region 12 and an N<+> type drain region 13 formed in a P type semiconductor substrate 11. The surface potential of the region L1 is controlled by the potential of the selective gate electrode 17; that of the region L2 by the potentials of the region 13 and the floating gate electrode 16; and that of the region L3 by the potentials of the electrodes 17 and 16. In this construction, the difference in surface potential of the regions L3 and L1 can be reduced and programmed by impressing high voltage on the electrode 17 or 16. Electrons flowing out of the region 12 exceed the potential of the region L3 and enter an acceleration region; therefore, there is no voltage drop before an injected region. Consequently, many high-energy electrons generate in the injected region of the region L3 and enter the electrode 16 with good efficiency.
申请公布号 JPS60182776(A) 申请公布日期 1985.09.18
申请号 JP19840038127 申请日期 1984.02.29
申请人 KOGYO GIJUTSUIN (JAPAN);SEIKO DENSHI KOGYO KK 发明人 HAYASHI YUTAKA;KOJIMA YOSHIKAZU;KAMIYA MASAAKI
分类号 H01L21/8247;H01L29/788;H01L29/792;(IPC1-7):H01L29/78 主分类号 H01L21/8247
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