发明名称 MASK ARITHMETIC UNIT
摘要 PURPOSE:To shorten a processing time necessary for a mask arithmetic which has to be executed for all data by processing a mask arithmetic for data in parallel as much as possible. CONSTITUTION:When a mask arithmetic is started, one bit corresponding to an input buffer 1 is supplied to a corresponding arithmetic table, and two bits corresponding to line memories 4 and 10 are supplied to said table under control of an address and a lead pulse. In the arithmetic table, the necessary mask arithmetic is executed. After the arithmetic is finished, data of the input buffer 1 and those of the line memory 4 are written in the line memories by one line in picture data are caused to exist in the input buffer 1 and the line memories 4 and 10, and a mask arithmetic is executed for three line picture data delayed by one line.
申请公布号 JPS60181972(A) 申请公布日期 1985.09.17
申请号 JP19840037912 申请日期 1984.02.29
申请人 FUJITSU KK 发明人 KATOU GENICHI
分类号 G06F17/16;G06F15/78 主分类号 G06F17/16
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