| 摘要 |
PURPOSE:To read out and process command efficiently by storing temporarily the command, which is read out from a main storage device, in a prefetch register to reduce the number of accesses to a DMA transfer bus for command read to a minimum value. CONSTITUTION:A data transfer control circuit 20 receives prescribed data from the main storage device, which is omitted in the figure, through a DMA transfer bus 100. The data transfer control circuit 20 transmits received data to a prefetch register 30 through a data line 300 and instructs the register 30 to store this data by a control signal line 301 and writes the first two bytes of received data in an accumulator 11 through a local data bus 200 and reports the end of command prefetch to a microprogram control circuit 10 through a control signal line 202. The microprogram control circuit 10 which receives said report processes the first two bytes of the command stored in the accumulator. Thereafter, the command is stored in the accumulator 11 through a control signal line 203 and the processing is executed. |
